FIG. 1 depicts a typical rectilinear connection pattern at an electrical interface. Illustratively, the interface is the interface between an integrated circuit and the substrate on which it is mounted which is known as the controlled, chip collapse connection (C4) and the individual connectors are solder balls or solder bumps and the pads on which they are mounted. Alternatively, the interface could be between a substrate and a higher level substrate or printed circuit board. Typically, the connections between the die and the substrate include connections for input/output (I/O) signals 110, for power 120, for ground 130, and for other purposes 140. As shown in FIG. 1, typical connection patterns tend to segregate each type of connection from the other types so that substantially all of the signal connections are in one portion of the interface, all of the power connections in another portion and all of the ground connections in a third portion.
Every signal junction presents a discontinuity to the signals sent across the medium. If not properly designed, large return loops can be created, causing large impedance discontinuities in the form of both mutual and self inductance.
As is known in the art, the input/output signals have return currents that pass through the power and ground connections. In high speed digital designs, the return current chooses the path of least impedance that minimizes the loop area between the outgoing and returning current paths because this is the path of least inductance. The return path which minimizes the loop area is typically directly underneath the signal path. In an ideal condition, both the signal trace and the return path are continuous without any impedance discrepancies. Interface design is critical in controlling this impedance.